Nhà sản xuất: TI

- Kiểu chân: DIP(16); Hãng: TI;

- High Voltage  CMOS Presettable Up/Down Counter, 4-stage binary or BCD-decade, Input Clock up to 11MHZ, Trigger: Positive Edge, VCC = 3 - 18V.

Giá: 4,500đ/ con

S.LượngĐơn giá

Còn: 200

Số lượng mua:

Thông tin sản phẩm

CD4029BE DIP-16 DataSheet

CMOS Presettable Up/Down Counter


CD4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN (CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAN signals, Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as outputs.

  • Medium-speed operation… 8 MHz (typ.) @ CL = 50 pF and VDD–VSS = 10 V
  • Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times
  • "Preset Enable" and individual "Jam" inputs provided
  • Binary or decade up/down counting
  • BCD outputs in decade mode
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range) =
    1 V at VDD = 5 V
    2 V at VDD = 10 V
    2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Programmable binary and decade counting/frequency synthesizers-BCD output
  • Analog to digital and digital to analog conversion
  • Up/Down binary counting
  • Magnitude and sign generation
  • Up/Down decade counting
  • Difference counting

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